Adobe Systems
jan.kral@fi.muni.cz
PV191: Introduction
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̶Course organization, introduction to HDL tools

jan.kral@fi.muni.cz
Course Organization
̶Silicon design group
̶A415, Thursday 12:00 – 14:00
̶Group projects
̶Consultations
̶Tiny Tapeout
̶https://tinytapeout.com/
̶TT06: 19.04.2024
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Week01: Introduction
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jan.kral@fi.muni.cz
Tiny Tapeout Possibilities
̶Pins:
̶clk
̶rst
̶8x inout
̶8x out
̶8x in
̶Limitations:
̶Output max. frequency 33 MHz
̶Input max. frequency  66 MHz
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Week01: Introduction
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jan.kral@fi.muni.cz
Tiny Tapeout Flow
̶Watch how to started video
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̶Fork example Github project
̶https://github.com/TinyTapeout/tt06-verilog-template
̶Allow github action: Settings -> Pages -> Build and deployment -> Source -> Github actions
̶Modify info.yaml with your project information
̶Make changes and push to github
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Week01: Introduction
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jan.kral@fi.muni.cz
Tiny Tapeout Design Ideas
̶Inspire yourself by previous projects:
̶https://tinytapeout.com/runs/
̶Community ideas:
̶https://docs.google.com/document/d/1EtuYTrtAT3-umwonZHsstT9JR8zM2rreEYxW4RXH98o/edit#heading=h.8gh
yyq6b1smo
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Week01: Introduction
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