FI:PB170 Seminar on Dig.Syst. Design - Course Information
PB170 Seminar on Digital System Design
Faculty of InformaticsAutumn 2024
- Extent and Intensity
- 0/2/0. 2 credit(s) (plus extra credits for completion). Type of Completion: k (colloquium).
In-person direct teaching - Teacher(s)
- doc. RNDr. Zdeněk Matěj, Ph.D. (lecturer)
prof. Ing. Václav Přenosil, CSc. (alternate examiner)
Mgr. Oldřich Pecák (seminar tutor) - Guaranteed by
- doc. RNDr. Zdeněk Matěj, Ph.D.
Department of Computer Systems and Communications – Faculty of Informatics
Contact Person: doc. RNDr. Zdeněk Matěj, Ph.D.
Supplier department: Department of Computer Systems and Communications – Faculty of Informatics - Timetable of Seminar Groups
- PB170/01: Wed 25. 9. to Wed 18. 12. Wed 14:00–15:50 A415, Z. Matěj, O. Pecák
PB170/02: Wed 25. 9. to Wed 18. 12. Wed 16:00–17:50 A415, Z. Matěj, O. Pecák - Course Enrolment Limitations
- The course is also offered to the students of the fields other than those the course is directly associated with.
The capacity limit for the course is 26 student(s).
Current registration and enrolment status: enrolled: 25/26, only registered: 0/26, only registered with preference (fields directly associated with the programme): 0/26 - fields of study / plans the course is directly associated with
- there are 36 fields of study the course is directly associated with, display
- Course objectives
- At the end of the course students should be able to: understand the main concepts of digital system design (combinational and sequential circuits); know the realization of basic design (adders, counters, state automata); create and simulate the simple design.
- Learning outcomes
- At the end of the course, students will be able to:
formally describe a logic circuit composed of combinational or sequential circuits;
design a simple digital system;
simulate the behavior of digital circuits;
the basic design of logic circuits in HDL Verilog - Syllabus
- Fundamentals of digital systems: description of a logic circuit, design methods.
- Basic entities: primitives (gates), combinatorial circuits, sequential circuits.
- Practical exercises with tools like Hades and Quartus.
- A short introduction into HDL, Verilog.
- Literature
- THOMAS, Donald E. and Philip R. MOORBY. The Verilog hardware description language. 5. ed. New York: Springer, 2002, xx, 381. ISBN 1402070896. info
- Teaching methods
- Computer lab seminar.
- Assessment methods
- The evaluation consists of:
a) defense of a set of tasks submitted during semester;
b) defense of the final project. - Language of instruction
- English
- Follow-Up Courses
- Further comments (probably available only in Czech)
- Study Materials
The course is taught annually. - Teacher's information
- The course will take place at the EmLab - A415.
- Enrolment Statistics (recent)
- Permalink: https://is.muni.cz/course/fi/autumn2024/PB170