FI:PB151 Computer Systems - Course Information

PB151 Computer Systems

Faculty of Informatics
Autumn 2020

Extent and Intensity

3/0/0. 3 credit(s) (plus extra credits for completion). Type of Completion: zk (examination).

Teacher(s)

doc. Ing. Michal Brandejs, CSc. (lecturer)

Guaranteed by

doc. Ing. Michal Brandejs, CSc.
Department of Computer Systems and Communications – Faculty of Informatics
Contact Person: doc. Ing. Michal Brandejs, CSc.
Supplier department: Department of Computer Systems and Communications – Faculty of Informatics

Timetable

Thu 12:00–14:50 D1

Prerequisites (in Czech)

! NOW( PB150 Computer-Systems Architectures )

Course Enrolment Limitations

The course is also offered to the students of the fields other than those the course is directly associated with.

fields of study / plans the course is directly associated with

there are 61 fields of study the course is directly associated with, display

Course objectives

At the end of the course student should be able to understand and explain a general technical principles about computer systems operation.

Learning outcomes

At the end of this course the student will be able to understand basic principles of digital computers; understand the design of numerical systems used in computer technology and convert numbers between systems; will understand the principles of storing information, coding and storing texts. The student will understand the principles of the elementary processor and its programming at the lowest level. Student general principles compare with a specific implementation on Intel x86 processors and will be able to understand the implemented technologies of paging, caching and some others.

Syllabus

Terms, history, computer generations, categories.
Numeral systems, differences between systems, integer, arithmetics.
Codes, internal, external, ECC.
Electronic circuits, memories: parameters, architecture.
Processor, programming, microprogramming.
Processor architecture, memory addresses, operational modes, register structures.
Architectures: RISC/CISC, cache memories.
IEEE 754.
I/O devices and its connections.

Literature